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Gate array
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141	2011 NA62 Status Report to the CERN SPSC Abstract NA62 will study the rare decay K + → π + ν ν¯ at the CERN SPS. We report here progress on the construction and the preparations for the experiment since November 20 Add to Reading List Source URL: na62.web.cern.ch Language: English - Date: 2011-03-28 09:08:57 Large Hadron Collider CERN Application programming interfaces Integrated circuits GTK+ LHCb Field-programmable gate array Application-specific integrated circuit Data analysis Software Physics Computing
142	2014 The magazine of record for the embedded computing industry Advertiser Reference Add to Reading List Source URL: www.rtcmagazine.com Language: English - Date: 2014-04-04 18:08:12 Computing Technology Xilinx Advanced Micro Devices Internet of Things Smart grid Field-programmable gate array Fabless semiconductor companies Electronic engineering Embedded system
143	CyberWorkBench® High-Level Synthesis and Verification by: SystemC High-Level Synthesis and Verification Add to Reading List Source URL: www.aldec.com Language: English - Date: 2013-08-07 16:44:00 Fabless semiconductor companies Hardware description languages Logic design Aldec Field-programmable gate array Xilinx High-level synthesis Altera SystemC Electronic engineering Digital electronics Electronic design automation
144	The Fifth International Conference on Innovative Computing Technology (INTECHUniversidad de Vigo, Vigo, Spain Venue: Pazo Los Escudos, Vigo, Spain May 20-22, 2015 Program at a glance Day 1: May 20, 2015 Add to Reading List Source URL: socio.org.uk Language: English - Date: 2015-05-12 10:12:35 Break Field-programmable gate array Software Caffeine Coffee Keynote
145	DESIGNCON 2011 Technical Papers The Universal PCB Design Grid System Tom Hausherr Receiver Tolerance Testing With Crosstalk Aggressors Arvind Kumar, Martin Miller Add to Reading List Source URL: www.designcon.com Language: English - Date: 2014-12-22 13:34:10 Electronic design automation Jitter Synchronization Signal integrity Phase noise SerDes Field-programmable gate array Electronic engineering Electronics Digital electronics
146	iCE40™ LP/HX Family Data Sheet DS1040 Version 3.1, March 2015 iCE40 LP/HX Family Data Sheet Introduction February 2014 Add to Reading List Source URL: www.latticesemi.com Language: English - Date: 2015-03-17 13:57:43 Electronic circuits Digital electronics Electronic design Oscillators Computer memory Phase-locked loop Flip-flop Field-programmable gate array Pull-up resistor Electronic engineering Electronics Electromagnetism
147	2011 International Conference on Reconfigurable Computing and FPGAs An Energy Efﬁcient FPGA Accelerator for Monte Carlo Option Pricing with the Heston Model Christian de Schryver, Ivan Shcherbakov, Frank Kienle, Norbe Add to Reading List Source URL: ems.eit.uni-kl.de Language: English - Date: 2012-02-27 11:00:29 Finance Electronic engineering Digital electronics Stochastic processes Reconfigurable computing Xilinx Field-programmable gate array Parallel computing Valuation of options Options Financial economics Mathematical finance
148	1 Yosys Application Note 010: Converting Verilog to BLIF Clifford Wolf November 2013 Add to Reading List Source URL: www.clifford.at Language: English - Date: 2015-02-09 07:25:25 Digital electronics Logic design Verilog Logic synthesis Field-programmable gate array High-level synthesis Finite-state machine VHDL AS/400 Control Language Electronic engineering Hardware description languages Electronic design automation
149	HES-DVM™ HW/SW Validation Platform Hybrid Verification Platform HES-DVMTM is a Hybrid Verification and Validation Platform for Hardware and Software developers of SoC and ASIC designs up to 144M ASIC gates. Utilizing Add to Reading List Source URL: www.aldec.com Language: English - Date: 2015-02-02 17:14:32 Hardware verification languages Aldec Logic design Hardware emulation Hardware description languages Field-programmable gate array Joint Test Action Group Mentor Graphics Application-specific integrated circuit Electronic engineering Electronic design automation Digital electronics
150	Paper Title 3D Si Interposer Design and Electrical Performance Study Authors Mandy (Ying) Ji Add to Reading List Source URL: www.designcon.com Language: English - Date: 2014-12-22 13:34:10 Electronic circuits Electronic design automation Jitter Synchronization Signal integrity Printed circuit board Integrated circuit design Phase noise Field-programmable gate array Electronics Electronic engineering Electromagnetism